Why the ROM Bootloader Cannot Load U-Boot Directly into DDR Memory in a BeagleBone Board

In this article, we explain why the ROM bootloader (RBL) cannot load u-boot directly into the DDR memory in a beaglebone board and requires a SPL (secondary program loader) in order to load u-boot.

So the question is, why can't the RBL loader code on the board load U-boot directly into DDR memory instead of passing this job onto the SPL?

The reason why the ROM boot loader of the beaglebone board cannot load U-boot directly into DDR3 memory is that the ROM code doesn't have any idea what kind of DDR RAM is being used on the board.

ROM code is entirely specific to the chip, which in the case of a beaglebone black board is the AM335x chip.

The AM335x chip is what contains the ROM of the beaglebone board. The AM335x chip is created and manufactured by Texas Instruments, and ROM cannot be modified (Read-only memory).

Therefore, the board manufacturer such as the manufacturer of the beaglebone board has no way of hardcoding the board-specific information to the ROM, because they don't create the ROM and it is unmodifiable.

Therefore, this information must be coded into the SPL (secondary program loader or second stage boot loader), so that U-Boot can then be booted.

We can have several different boards, with each board containing its own DDR memory. Some may have DDR2 memory. Others may have DDR3 memory. DDR memory has many attributes, including speed, bandwidth, clock frequency, etc.

In order to interact with DDR memory (either to read from it or to write to it), the tuning parameters must be set peroperly and the DDR registers must be initialized properly.

With all the types and different parameters, it would be impossible for the ROM to be able to load u-boot directly into DDR memory.

So what RBL does is it simply fetches the SPL found in memory devices such as the eMMC or the SD card, or from peripherals such as UART, EMAC, etc.

And in that SPL/MLO, you specify the type of DDR the board has. You can change the SPL code to include the specific parameters of your board. Once the code is modified appropriately, you can rebuild it and generate the binary to use it as the second stage bootloader.

To get the DDR parameters correct, you have to change the DDR related header files and the tuning parameter macros of the SPL, rebuild it, and generate the binary.

This can allow the SPL to load U-boot, which is the third stage boot loader, which is the program which loads in the linux kernel.

So this is why we need a SPL in order to load U-boot and why the RBL cannot directly load U-boot itself.

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