How to Measure a Signal using a Timer in Input Capture Mode in an STM32F446 Microcontroller Board in C

In this article, we show how to measure an incoming signal on a pin by using a timer in input capture mode in an STM32F446 microcontroller board in C.

A pin configured in input capture mode for a given timer listens for some event such as a device to go from OFF to ON, which would be a rising edge. Once detected, it latches the counter value at the event of the edge and will do so for repeated rising edges. This way, we can detect each time a device gets turned ON. By simple equations, we can then compute things desired such as the frequency of the device turning on and its time period (how long it takes for the device to turn back on once turned on).

Input capture mode has strong application for devices such as sensors, to measure the frequency of turn-on's or turn-off's.

In this example project, we will toggle an LED using output capture mode and then connect this pin to a pin configured in input capture mode. We will then configure it to detect every rising edge to determine each time that the LED is turned on.

In order to do this, we utilize 2 general-purpose timers.

Specifically in this project, we utilize timer 2 to be in output capture mode. And we utilize timer 3 to be in input capture mode.

For each of these timers, there needs to be one designed pin that acts as the channel input or output for the timer.

In this project, we choose pin PA5 to act as the output channel for timer 2 (which is configured in output compare mode). This pin has an onboard LED connected to it. With it in output compare mode, we toggle the LED on and off with a 1Hz clock signal. This means that the LED turns on and off every second.

We then take this pin output at PA5 and connect it to PA6, configuring pin PA6 in input capture mode. This way, we can measure whenever the LED turns on by measuring the counter time of each rising edge that occurs.

We create the output compare function and the input capture function completely separate, so that you can see independently how each is set up.

We need 2 major code files in order for this code to work.

We need our header file, which contains many macros and structures that describe the various registers and needed values.

We then need our main C file, which contains the code that puts timer 2 in output compare mode in a toggle state so that it can toggle an LED on and off every 1 second and that puts timer 3

Below is the header file, which we name stm32f407xx.h


/* * stm32f446.h * * Created on: May 6, 2022 * Author: dlhyl */ #ifndef STM32F446_H_ #define STM32F446_H_ #include <stdint.h> #define __vo volatile #define IRQ_NO_EXTI0 6 #define IRQ_NO_EXTI1 7 #define IRQ_NO_EXTI2 8 #define IRQ_NO_EXTI3 9 #define IRQ_NO_EXTI4 10 #define IRQ_NO_EXTI9_5 23 #define IRQ_NO_EXTI15_10 40 //Processor specific details #define NVIC_ISER0 0xE000E100U #define NVIC_ISER1 0xE000E104U #define NVIC_ISER2 0xE000E108U #define NVIC_ISER3 0xE000E10CU volatile uint32_t* pNVIC_ISER0= ((volatile uint32_t*)NVIC_ISER0); volatile uint32_t* pNVIC_ISER1= ((volatile uint32_t*)NVIC_ISER1); volatile uint32_t* pNVIC_ISER2= ((volatile uint32_t*)NVIC_ISER2); volatile uint32_t* pNVIC_ISER3= ((volatile uint32_t*)NVIC_ISER3); #define NVIC_ICER0 0xE000E180U #define NVIC_ICER1 0xE000E184U #define NVIC_ICER2 0xE000E188U #define NVIC_ICER3 0xE000E18CU volatile uint32_t* pNVIC_ICERO= ((volatile uint32_t*)NVIC_ICER0); volatile uint32_t* pNVIC_ICER1= ((volatile uint32_t*)NVIC_ICER1); volatile uint32_t* pNVIC_ICER2= ((volatile uint32_t*)NVIC_ICER2); volatile uint32_t* pNVIC_ICER3= ((volatile uint32_t*)NVIC_ICER3); #define NVIC_PR_BASEADDR 0xE000E400U volatile uint32_t* pNVIC_PR_BASEADDR= ((volatile uint32_t*)NVIC_PR_BASEADDR); #define SYS_FREQ 16000000U #define APB1_CLK SYS_FREQ #define USART_BAUDRATE 115200 #define FLASH_BASEADDR 0x08000000U #define SRAM1_BASEADDR 0x20000000U #define SRAM2_BASEADDR 0x20001C00U #define ROM_BASEADDR 0x1FFF0000U #define SRAM SRAM1_BASEADDR #define PERIPH_BASEADDR 0x40000000U #define APB1PERIPH_BASEADDR PERIPH_BASEADDR #define APB2PERIPH_BASEADDR 0x40010000U #define AHB1PERIPH_BASEADDR 0x40020000U #define AHB2PERIPH_BASEADDR 0x50000000U //#define SYSCFG_BASEADDR 0x40013800U //#define EXTI_BASEADDR 0x40013C00U #define GPIOA_BASEADDR (AHB1PERIPH_BASEADDR + 0x0000) #define GPIOB_BASEADDR (AHB1PERIPH_BASEADDR + 0x0400) #define GPIOC_BASEADDR (AHB1PERIPH_BASEADDR + 0x0800) #define GPIOD_BASEADDR (AHB1PERIPH_BASEADDR + 0x0C00) #define GPIOE_BASEADDR (AHB1PERIPH_BASEADDR + 0x1000) #define GPIOF_BASEADDR (AHB1PERIPH_BASEADDR + 0x1400) #define GPIOG_BASEADDR (AHB1PERIPH_BASEADDR + 0x1800) #define GPIOH_BASEADDR (AHB1PERIPH_BASEADDR + 0x1C00) #define GPIOI_BASEADDR (AHB1PERIPH_BASEADDR + 0x2000) #define RCC_BASEADDR (AHB1PERIPH_BASEADDR + 0x3800) #define I2C1_BASEADDR (APB1PERIPH_BASEADDR + 0x5400) #define I2C2_BASEADDR (APB1PERIPH_BASEADDR + 0x5800) #define I2C3_BASEADDR (APB1PERIPH_BASEADDR + 0x5C00) #define SPI2_BASEADDR (APB1PERIPH_BASEADDR + 0x3800) #define SPI3_BASEADDR (APB1PERIPH_BASEADDR + 0x3C00) #define USART2_BASEADDR (APB1PERIPH_BASEADDR + 0x4400) #define USART3_BASEADDR (APB1PERIPH_BASEADDR + 0x4800) #define UART4_BASEADDR (APB1PERIPH_BASEADDR + 0x4C00) #define UART5_BASEADDR (APB1PERIPH_BASEADDR + 0x5000) #define TIM2_BASEADDR (APB1PERIPH_BASEADDR + 0x0000) #define TIM3_BASEADDR (APB1PERIPH_BASEADDR + 0x0400) #define TIM4_BASEADDR (APB1PERIPH_BASEADDR + 0x0800) #define TIM5_BASEADDR (APB1PERIPH_BASEADDR + 0x0C00) #define EXTI_BASEADDR (APB2PERIPH_BASEADDR + 0x3C00) #define SPI1_BASEADDR (APB2PERIPH_BASEADDR + 0x3000) #define SPI4_BASEADDR (APB2PERIPH_BASEADDR + 0x3400) #define SYSCFG_BASEADDR (APB2PERIPH_BASEADDR + 0x3800) #define USART1_BASEADDR (APB2PERIPH_BASEADDR + 0x1000) #define USART6_BASEADDR (APB2PERIPH_BASEADDR + 0x1400) #define SPI5_BASEADDR (APB2PERIPH_BASEADDR + 0x5000) #define SPI6_BASEADDR (APB2PERIPH_BASEADDR + 0x5400) typedef struct { volatile uint32_t MODER; volatile uint32_t OTYPER; volatile uint32_t OSPEEDR; volatile uint32_t PUPDR; volatile uint32_t IDR; volatile uint32_t ODR; volatile uint32_t BSRR; volatile uint32_t LCKR; volatile uint32_t AFRL; volatile uint32_t AFRH; }GPIO_RegDef_t; #define GPIOA ((GPIO_RegDef_t*)GPIOA_BASEADDR) #define GPIOB ((GPIO_RegDef_t*)GPIOB_BASEADDR) #define GPIOC ((GPIO_RegDef_t*)GPIOC_BASEADDR) #define GPIOD ((GPIO_RegDef_t*)GPIOD_BASEADDR) #define GPIOE ((GPIO_RegDef_t*)GPIOE_BASEADDR) #define GPIOF ((GPIO_RegDef_t*)GPIOF_BASEADDR) #define GPIOG ((GPIO_RegDef_t*)GPIOG_BASEADDR) #define GPIOH ((GPIO_RegDef_t*)GPIOH_BASEADDR) #define GPIOI ((GPIO_RegDef_t*)GPIOI_BASEADDR) #define RCC ((RCC_RegDef_t*)RCC_BASEADDR) GPIO_RegDef_t *pGPIOA= GPIOA; GPIO_RegDef_t *pGPIOB= GPIOB; GPIO_RegDef_t *pGPIOC= GPIOC; GPIO_RegDef_t *pGPIOD= GPIOD; GPIO_RegDef_t *pGPIOE= GPIOE; GPIO_RegDef_t *pGPIOF= GPIOF; GPIO_RegDef_t *pGPIOG= GPIOG; GPIO_RegDef_t *pGPIOH= GPIOH; GPIO_RegDef_t *pGPIOI= GPIOI; typedef struct { volatile uint32_t CR; volatile uint32_t PLLCFGR; volatile uint32_t CFGR; volatile uint32_t CIR; volatile uint32_t AHB1RSTR; volatile uint32_t AHB2RSTR; volatile uint32_t AHB3RSTR; uint32_t RESERVED0; volatile uint32_t APB1RSTR; volatile uint32_t APB2RSTR; uint32_t RESERVED1[2]; volatile uint32_t AHB1ENR; volatile uint32_t AHB2ENR; volatile uint32_t AHB3ENR; uint32_t RESERVED2; volatile uint32_t APB1ENR; volatile uint32_t APB2ENR; uint32_t RESERVED3[2]; volatile uint32_t AHB1LPENR; volatile uint32_t AHB2LPENR; volatile uint32_t AHB3LPENR; uint32_t RESERVED4; volatile uint32_t APB1LPENR; volatile uint32_t APB2LPENR; uint32_t RESERVED5[2]; volatile uint32_t BDCR; volatile uint32_t CSR; uint32_t RESERVED6[2]; volatile uint32_t SSCGR; volatile uint32_t PLLI2SCFGR; volatile uint32_t PLLSAICFGR; volatile uint32_t DCKCFGR; volatile uint32_t CKGATENR; volatile uint32_t DCKCFGR2; }RCC_RegDef_t; RCC_RegDef_t *pRCC= RCC; typedef struct { volatile uint32_t MEMRMP; volatile uint32_t PMC; volatile uint32_t EXTICR1; volatile uint32_t EXTICR2; volatile uint32_t EXTICR3; volatile uint32_t EXTICR4; uint32_t RESERVED1[2]; volatile uint32_t CMPCR; }SYSCFG_RegDef_t; SYSCFG_RegDef_t *pSYSCFG= ((SYSCFG_RegDef_t*)SYSCFG_BASEADDR); #define SYSCFG ((SYSCFG_RegDef_t*)SYSCFG_BASEADDR) typedef struct { volatile uint32_t IMR; volatile uint32_t EMR; volatile uint32_t RTSR; volatile uint32_t FTSR; volatile uint32_t SWIER; volatile uint32_t PR; }EXTI_RegDef_t; EXTI_RegDef_t *pEXTI= ((EXTI_RegDef_t*)EXTI_BASEADDR); #define EXTI ((EXTI_RegDef_t*)EXTI_BASEADDR) typedef struct { volatile uint32_t CR1; volatile uint32_t CR2; volatile uint32_t SR; volatile uint32_t DR; volatile uint32_t CRCPR; volatile uint32_t RXCRCR; volatile uint32_t TXCRCR; volatile uint32_t I2SCFGR; volatile uint32_t I2SPR; }SPI_RegDef_t; SPI_RegDef_t *pSPI1= ((SPI_RegDef_t*)SPI1_BASEADDR); SPI_RegDef_t *pSPI2= ((SPI_RegDef_t*)SPI2_BASEADDR); SPI_RegDef_t *pSPI3= ((SPI_RegDef_t*)SPI3_BASEADDR); SPI_RegDef_t *pSPI4= ((SPI_RegDef_t*)SPI4_BASEADDR); SPI_RegDef_t *pSPI5= ((SPI_RegDef_t*)SPI5_BASEADDR); SPI_RegDef_t *pSPI6= ((SPI_RegDef_t*)SPI6_BASEADDR); #define SPI1 ((SPI_RegDef_t*)SPI1_BASEADDR) #define SPI2 ((SPI_RegDef_t*)SPI2_BASEADDR) #define SPI3 ((SPI_RegDef_t*)SPI3_BASEADDR) #define SPI4 ((SPI_RegDef_t*)SPI4_BASEADDR) #define SPI5 ((SPI_RegDef_t*)SPI5_BASEADDR) #define SPI6 ((SPI_RegDef_t*)SPI6_BASEADDR) typedef struct { volatile uint32_t CR1; volatile uint32_t CR2; volatile uint32_t OAR1; volatile uint32_t OAR2; volatile uint32_t DR; volatile uint32_t SR1; volatile uint32_t SR2; volatile uint32_t CCR; volatile uint32_t TRISE; volatile uint32_t FLTR; }I2C_RegDef_t; I2C_RegDef_t *pI2C1= ((I2C_RegDef_t*)I2C1_BASEADDR); I2C_RegDef_t *pI2C2= ((I2C_RegDef_t*)I2C2_BASEADDR); I2C_RegDef_t *pI2C3= ((I2C_RegDef_t*)I2C3_BASEADDR); #define I2C1 ((I2C_RegDef_t*)I2C1_BASEADDR) #define I2C2 ((I2C_RegDef_t*)I2C2_BASEADDR) #define I2C3 ((I2C_RegDef_t*)I2C3_BASEADDR) typedef struct { volatile uint32_t SR; volatile uint32_t DR; volatile uint32_t BRR; volatile uint32_t CR1; volatile uint32_t CR2; volatile uint32_t CR3; volatile uint32_t GTPR; }USART_RegDef_t; USART_RegDef_t *pUSART1= ((USART_RegDef_t*)USART1_BASEADDR); USART_RegDef_t *pUSART2= ((USART_RegDef_t*)USART2_BASEADDR); USART_RegDef_t *pUSART3= ((USART_RegDef_t*)USART3_BASEADDR); USART_RegDef_t *pUART4= ((USART_RegDef_t*)UART4_BASEADDR); USART_RegDef_t *pUART5= ((USART_RegDef_t*)UART5_BASEADDR); USART_RegDef_t *pUSART6= ((USART_RegDef_t*)USART6_BASEADDR); #define USART1 ((USART_RegDef_t*)USART1_BASEADDR) #define USART2 ((USART_RegDef_t*)USART2_BASEADDR) #define USART3 ((USART_RegDef_t*)USART3_BASEADDR) #define USART4 ((USART_RegDef_t*)UART4_BASEADDR) #define USART5 ((USART_RegDef_t*)UART5_BASEADDR) #define USART6 ((USART_RegDef_t*)USART6_BASEADDR) typedef struct { volatile uint32_t CR1; volatile uint32_t CR2; volatile uint32_t SMCR; volatile uint32_t DIER; volatile uint32_t SR; volatile uint32_t EGR; volatile uint32_t CCMR1; volatile uint32_t CCMR2; volatile uint32_t CCER; volatile uint32_t CNT; volatile uint32_t PSC; volatile uint32_t ARR; uint32_t RESERVED0; volatile uint32_t CCR1; volatile uint32_t CCR2; volatile uint32_t CCR3; volatile uint32_t CCR4; uint32_t RESERVED1; volatile uint32_t DCR; volatile uint32_t DMAR; volatile uint32_t OR; }TIM_RegDef_t; TIM_RegDef_t *pTIM2= ((TIM_RegDef_t*)TIM2_BASEADDR); TIM_RegDef_t *pTIM3= ((TIM_RegDef_t*)TIM3_BASEADDR); TIM_RegDef_t *pTIM4= ((TIM_RegDef_t*)TIM4_BASEADDR); TIM_RegDef_t *pTIM5= ((TIM_RegDef_t*)TIM5_BASEADDR); #define TIM2 ((TIM_RegDef_t*)TIM2_BASEADDR) #define TIM3 ((TIM_RegDef_t*)TIM3_BASEADDR) #define TIM4 ((TIM_RegDef_t*)TIM4_BASEADDR) #define TIM5 ((TIM_RegDef_t*)TIM5_BASEADDR) #endif /* STM32F446_H_ */

The contents of the main.c file is shown below.


#include <stdint.h> #include "stm32f446.h" void tim2_pa5_output_compare(void); void tim3_pa6_input_capture(void); int countercapture = 0; //Set up: Connect a jumper wire from PA5 to PA6 int main(void) { tim2_pa5_output_compare(); tim3_pa6_input_capture(); while(1) { //Wait until the edge is captured while(!((pTIM3->SR) & (1 << 1))); //Read the captured value countercapture= pTIM3->CCR1; } } void tim2_pa5_output_compare(void) { //Turn on peripheral clock for GPIO Port A pRCC->AHB1ENR |= (1 << 0); //Sets PA5 in alternate function mode pGPIOA->MODER |= (0b10 << 10); //Sets PA5 to alternate function mode to act as TIM2_CH1 (AF1) pGPIOA->AFRL |= (0b0001 << 20); //Enable clock access to tim2 pRCC->APB1ENR |= (1 << 0); //Set the prescaler value pTIM2->PSC = 48000-1; //Set auto-reload value pTIM2->ARR = 1000 -1; //Sets Output compare to toggle mode pTIM2->CCMR1 |= (0b011 << 4); //Enable tim2 ch1 in compare mode pTIM2->CCER |= (1 << 0); //Clear the counter pTIM2->CNT= 0; //Enable the timer pTIM2->CR1 |= (1 << 0); } void tim3_pa6_input_capture(void) { //Turn on peripheral clock for GPIO Port A pRCC->AHB1ENR |= (1 << 0); //Sets PA 6in alternate function mode pGPIOA->MODER |= (0b10 << 12); //Sets PA6 to alternate function mode to act as TIM3_CH1 (AF2) pGPIOA->AFRL |= (0b0010 << 24); //Enable clock access to tim3 pRCC->APB1ENR |= (1 << 1); //Set the prescaler value pTIM3->PSC = 16000 - 1; //Set CH1 to input capture pTIM3->CCMR1 = (0b01 << 0); //Enable tim2 ch1 in compare mode pTIM3->CCER = (1 << 0); //Enable the timer pTIM3->CR1 = (1 << 0); }

The first thing we must do is include the stdint.h header file and our stm32f446xx.h header file in our main.c file.

After this, we have the prototypes for the 2 functions we will in our program; this tells the compiler the names of the functions, what they return, and the parameter(s) and their types they take in.

We then create a global variable, countercapture, which we set equal to 0.

You will see later in this program that this variable will be used to store the counter value when a rising edge is detected on pin PA5. We'll be able to review this result live as it's occurring.

So next we have our main() function.

We will get to this main() function, but before, we do let's go down to the 2 other functions for the timers. These functions initialize the timers.

Our first timer function, tim2_pa5_output_compare(), places timer 2 in output commpare mode on pin PA5.

We are not going to go in-depth with this timer setup, because we there is a separate article specifically for placing a Timer in Output Compare Mode.

Simply, timer 2 is set up so that it sends a waveform that toggles every 1 second, and this waveform is then sent to pin PA5, which acts as TIM2_CH1 in alternate function mode AF1.

We then have our next function, tim3_pa6_input_capture(), which is the timer function which functions in input capture mode.

We go through this in depth.

We turn on the GPIO Port A peripheral clock, because we are using pin PA6 to act as the timer channel to receive the input capture mode. Or, in other words, this pin will receive the output from pin PA5, when we connect both pins with a jumper wire, so that it can read the counter value of a rising edge in the waveform.

So after turning on the GPIO Port A clock, the next thing we have to do is configure pin PA6 in alternate function mode. To do this, we first set the mode in alternate function mode in the mode register. We then go to the AFRL (Alternate function register low).

But before we configure this register, we should view the Alternate Function Mapping of the GPIO Port A register.

This is shown below.

Looking at this map, we can see that PA6 can act as TIM3_CH1 when alternate function mode is configured to AF2. So that is what we need to do. We need to set pin 6 to alternate function mode AF2 in the AFRL register.

This is done in the following line of code, pGPIOA->AFRL |= (0b0010 << 24);

Now that alternate function mode is completely configured, we then have to enable clock access to timer 3.

Timer 3 is connected to the APB1 bus. Specifically timer 3 is bit 1 of the APB1ENR register. Therefore, to enable timer 3, we use the following line, pRCC->APB1ENR |= (1 << 1);

We then set the prescaler value to timer 3. We have the prescaler as the same as the prescaler in timer 2.

Next, we move on to setting the TIMx capture/compare mode register 1, which is a register that allows us to set channel 1 or 2 of a timer as either input or output.

In this case, since we are dealing with TIM3, we need to make its channel which is CH1 set up in input capture mode.

We then set bit 0, the CC1S bit, to HIGH, making the CC1 channel configured as input, IC1 mapped on TI1.

So now channel 1 of TIM3 is in input capture mode.

So after setting up channel 1 of TIM3 to input capture mode, we then have to enable capture mode.

This is done with the TIMx capture/compare enable register (TIMx_CCER), shown below.

So in order to enable capture mode of CH1 of TIM3, we must set bit 0, the CC1 channel, to HIGH, enabling capture.

We then must enable the timer itself, doing this by setting bit 0, the CEN bit (Counter enable), to HIGH in the TIMx control register 1.

We will now return to the infinite loop of our main function.

What we want to do is we want to ait until the edge is captured, and we can know when the edge is captured by bit 1, the CC1IF bit, of the TIMx status register.

Below is the TIMx status register.

According to the datasheet, if channel CC1 is configured as input, a 0 on this flag indicates no input capture occured. A 1 indicates that the counter value has been captured in TIMx_CCR1 register (An edge has been detected on IC1 which matches the selected polarity).

So we are able to wait until this Capture/compare 1 interrupt flag goes HIGH, through the line, while(!((pTIM3->SR) & (1 << 1)));

As long as the interrupt flag is 0, we stay in the while loop.

Once the interrupt flag is 1, we exit the while loop.

After this while loop, lastly we read the value of the CCR1 register into the variable countercapture.

The CCR1 is the timer capture/compare mode register 1, shown below.

If the CC1 channel is configured as input, which it is in our program, CCR1 is the counter value transferred by the last input capture 1 event (IC1).

So the value of the last counter capture of the last input capture is stored in this register. We then transfer its value to the countercapture variable.

Now before, we actually compile and run the program, we need to connect pins PA5 and PA6 so that the signal generated in the output compare mode from pin PA5 gets transferred to PA6, which is in input capture mode.

In order to know which pins are which, you need to consult the datasheet for the STM32F446 microcontroller board.

The pinout for the STM32F446RE microcontroller board is shown below.

So using this pinout, you can see exactly where pins PA5 and PA6 are located. You must establish electrical connection between them.

We then compile the program and run it in debug mode.

What we want to do is place the countercapture variable in the live expressions section of debug mode.

Once you click Resume on the debug mode, you should see the values of this countercapture variable updating in real time.

So this is how to measure a singal using a timer in input capture mode with an STM32F446 microcontroller board in C.

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